9FGL08数据手册集成电路（IC）的应用特定时钟/定时规格书PDF

描述 Description

The 9FGL0841/51 devices are 8-output 3.3V PCIe Gen1–5 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0841/51 supports PCIe Gen1–5 Common Clocked architectures (CC), PCIe Separate Reference no-Spread (SRNS) and Separate Reference Independent Spread (SRIS) clocking architectures.

特性 Features

• PCIe Gen1–5 CC-compliant
• Supports PCIe SRIS and SRNS clocking
• Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
• Pin-selectable SRnS 0%, CC 0% and CC/SRIS -0.5% spread
• SMBus-selectable CC/SRIS -0.25% spread
• One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
• Easy AC-coupling to other logic families, see application note AN-891.
• Space saving 6 × 6 mm 48-VFQFPN

应用 Application

• Genoa Server Solution