9FGL6251数据手册Renesas中文资料规格书

描述 Description

The 9FGL6251 is an intelligent buffer/clock generator tailored for single and dual-ported nVME SSDs. It supports Common (CC) and Independent Reference (IR) clocking architectures and is ideal for U.2 and M.2 form factors. The device is also useful in PCIe master/slave and clock multiplexing applications, with an internal clock generator as a third input channel.

特性 Features

• Automatically detects presence or absence of input clocks and switches clock modes
• One open-drain CC_IR output indicates PCIe clock mode
• Integrated crystal option available (Q option)
• Two 100MHz Low-power HCSL (LP-HCSL) outputs; 85Ω output impedance
• Integrated terminations on DIF outputs save 8 resistors
• 201, 301 configurations for SRnS (IR) or CC architectures default to 0% SSC
• 202, 302 configurations for SRIS (IR) or CC architectures default to -0.5% SSC
• SMBus-selectable -0.25% SSC
• Choice of 25MHz or 33 1/3MHz reference clock
• REF clock output saves external XO
• 2.5V or 3.3V operating voltage (VDDREF is 1.8V)
• 4 × 4 mm 28-VQFP-N package with external crystal
• 4 × 4 mm 28-LGA package with optional internal crystal
• Easy AC-coupling to other logic families, see IDT application note AN-891
• For devices with 100Ω output impedance, see 9FGL6241