8SLVP2106ANLGISLASHW中文资料瑞萨数据手册PDF规格书

厂商型号	8SLVP2106ANLGISLASHW
功能描述	Low Phase Noise, Dual 1-to-6, 3.3V, 2.5V LVPECL Output Fanout Buffer
丝印标识	IDT8SLVP2106ANLGI
封装外壳	VFQFN
文件大小	1.025329 Mbytes
页面数量	25 页
生产厂商	Renesas Technology Corp
企业简称	RENESAS【瑞萨】
中文名称	瑞萨科技有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-8-2 9:00:00
人工找货	8SLVP2106ANLGISLASHW价格和库存，欢迎联系客服免费人工找货

特性 Features

• Two 1:6, low skew, low additive jitter LVPECL fanout buffers

• Two differential clock inputs

• Differential PCLKA, nPCLKA and PCLKB, nPCLKB pairs can

accept the following differential input levels: LVDS, LVPECL, CML

• Differential PCLKA, nPCLKA and PCLKB, nPCLKB pairs can also

accept single-ended LVCMOS levels. See Applications section

Wiring the Differential Input Levels to Accept Single-ended Levels

(Figure 1A and Figure 1B).

• Maximum input clock frequency: 2GHz

• Output bank skew: 15ps (typical)

• Propagation delay: 340ps (maximum)

• Low additive phase jitter, RMS: 54fs (maximum)

fREF = 156.25MHz, VPP = 1V, 12kHz - 20MHz: VCC = 3.3V)

• Full 3.3V and 2.5V supply voltage modes

• Maximum device current consumption (IEE): 114mA

• Available in Lead-free (RoHS 6), 40-Lead VFQFN package

• -40°C to 85°C ambient operating temperature

• Supports case temperature  105°C operations