Low Skew, 1-to-15, LVCMOS/LVTTL Clock Generator

FEATURES • Fully integrated PLL • Fifteen single ended 3.3V LVCMOS/LVTTL outputs • Two LVCMOS/LVTTL clock inputs for redundant clock applications • CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL • Output frequency range: 8.33MHz to 125MHz • VCO range: 200MHz to 500MHz • Ext

文件：440.14 Kbytes 页数：17 Pages

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Low Skew, 1-to-15, LVCMOS/LVTTL Clock Generator

文件：245.2 Kbytes 页数：16 Pages

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Low Skew, 1-to-15 LVCMOS/LVTTL Clock Generator

The 87974I is a low skew, low jitter 1-to-15 LVCMOS/ LVTTL Clock Generator/Zero Delay Buffer. The device has a fully integrated PLL and three banks whose divider ratios can be independently controlled, providing output frequency relationships of 1:1, 2:1, 3:1, 3:2, 3:2:1. In addition, the external f • Fully integrated PLL\n• Fifteen single ended 3.3V LVCMOS/LVTTL outputs\n• Two LVCMOS/LVTTL clock inputs for redundant clock applications\n• CLK0 and CLK1 accepts the following input levels: LVCMOS/LVTTL\n• Output frequency range: 8.33MHz to 125MHz\n• VCO range: 200MHz to 500MHz\n• External feedbac;

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Fully integrated PLL

文件：167 Kbytes 页数：16 Pages

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