丝印：8794；Package：QFN-21；16V, 20A, Synchronous, Step-Down Converter with Adjustable Current Limit,

DESCRIPTION The MP8794 is a fully integrated, highfrequency, synchronous, buck converter. The MP8794 offers a compact solution that achieves up to 20A of output current with excellent load and line regulation over a wide input supply range. The MP8794 operates at high efficiency over a wide

文件：1.22453 Mbytes 页数：22 Pages

MPSIND

美国芯源

丝印：ICS7946AI01L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • LVPECL clock input pair • PCLK/nPCLK supports the following input levels: LVPECL, CML, SSTL • Maximum input frequency: 250MHz • Output skew: 120ps (maximum) • Part-to-part skew: 700ps (maximum) • Multiple freq

文件：438.79 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS7946AI01L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • LVPECL clock input pair • PCLK/nPCLK supports the following input levels: LVPECL, CML, SSTL • Maximum input frequency: 250MHz • Output skew: 120ps (maximum) • Part-to-part skew: 700ps (maximum) • Multiple freq

文件：438.79 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS7946AI147L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • Selectable LVCMOS/LVTTL CLK0 and CLK1 inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input frequency: 250MHz • Bank skew: 30ps (maximum) • Output skew: 175ps (maximum)

文件：411.15 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：ICS7946AI147L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • Selectable LVCMOS/LVTTL CLK0 and CLK1 inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input frequency: 250MHz • Bank skew: 30ps (maximum) • Output skew: 175ps (maximum)

文件：411.15 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：ICS7946AI147L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • Selectable LVCMOS/LVTTL CLK0 and CLK1 inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input frequency: 250MHz • Bank skew: 30ps (maximum) • Output skew: 175ps (maximum)

文件：411.15 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：ICS7946AI147L；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 2.5V, 3.3V Fanout Buffer

Features • Ten single ended LVCMOS/LVTTL outputs, 7 typical output impedance • Selectable LVCMOS/LVTTL CLK0 and CLK1 inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input frequency: 250MHz • Bank skew: 30ps (maximum) • Output skew: 175ps (maximum)

文件：411.15 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：ICS87946AYIL；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 3.3V Fanout Buffer

Features • Ten single-ended LVCMOS outputs, 7 typical output impedance • Selectable CLK0 and CLK1 LVCMOS clock inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input/output frequency: 150MHz • Output skew: 350ps (maximum) • 3.3V input, 3.3V outputs

文件：334.11 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：ICS87946AYIL；Package：LQFP；1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL 3.3V Fanout Buffer

Features • Ten single-ended LVCMOS outputs, 7 typical output impedance • Selectable CLK0 and CLK1 LVCMOS clock inputs • CLK0 and CLK1 can accept the following input levels: LVCMOS and LVTTL • Maximum input/output frequency: 150MHz • Output skew: 350ps (maximum) • 3.3V input, 3.3V outputs

文件：334.11 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：ICS7946AI147L；Package：LQFP；1-to-10 Low Skew, LVCMOS/LVTTL Fanout Buffer

文件：211.23 Kbytes 页数：14 Pages

IDT