DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS??JITTER ATTENUATOR

文件：1.31377 Mbytes 页数：19 Pages

IDT

DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS??JITTER ATTENUATOR

文件：1.99353 Mbytes 页数：20 Pages

IDT

DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS??JITTER ATTENUATOR

文件：1.99353 Mbytes 页数：20 Pages

IDT

Differential-to-LVDS/0.7V Differential PCI Express™ Jitter Attenuator

Features • Two LVDS and two 0.7V differential output pairs Bank A has two LVDS output pairs and Bank B has two 0.7V differential output pairs • One differential clock input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Output fr

文件：633.46 Kbytes 页数：23 Pages

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