丝印：870919BRI-01L；Package：QSOP；LVCMOS Clock Generator

Features • Two selectable single-ended input reference clocks • Eight single-ended clock outputs • Internal PLL does not require external loop filter components • 5V tolerant inputs • Maximum output frequency: 160MHz, (2XQ output) • Maximum output frequency: 80MHz, (Q0:Q4 and nQ5 outputs) •

文件：378.89 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：870919BRI-01L；Package：QSOP；LVCMOS Clock Generator

Features • Two selectable single-ended input reference clocks • Eight single-ended clock outputs • Internal PLL does not require external loop filter components • 5V tolerant inputs • Maximum output frequency: 160MHz, (2XQ output) • Maximum output frequency: 80MHz, (Q0:Q4 and nQ5 outputs) •

文件：378.89 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：870919BRI-01L；Package：QSOP；LVCMOS Clock Generator

Features • Two selectable single-ended input reference clocks • Eight single-ended clock outputs • Internal PLL does not require external loop filter components • 5V tolerant inputs • Maximum output frequency: 160MHz, (2XQ output) • Maximum output frequency: 80MHz, (Q0:Q4 and nQ5 outputs) •

文件：378.89 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：870919BRI-01L；Package：QSOP；LVCMOS Clock Generator

Features • Two selectable single-ended input reference clocks • Eight single-ended clock outputs • Internal PLL does not require external loop filter components • 5V tolerant inputs • Maximum output frequency: 160MHz, (2XQ output) • Maximum output frequency: 80MHz, (Q0:Q4 and nQ5 outputs) •

文件：378.89 Kbytes 页数：16 Pages

RENESAS

瑞萨