1:2, Differential-to-LVCMOS/LVTTL Zero 1:2, Differential-to-LVCMOS/LVTTL Zero

Features • Two LVCMOS/LVTTL outputs, 7 typical output impedance • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, HSTL, HCSL, SSTL • Internal bias on nCLK to support LVCMOS/LVTTL levels on CLK input • Output frequency range: 15.625MHz to 250MHz • Input freq

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Output frequency range

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IDT

1:2, Differential-to-LVCMOS/LVTTL Zero Delay Clock Generator

The 87002-02 is a highly versatile 1:2 Differential-to- LVCMOS/LVTTL Clock Generator. The 87002-02 has a differential clock input. The CLK, nCLK pair can accept most standard differential input levels. Internal bias on the nCLK input allows the CLK input to accept LVCMOS/LVTTL. The 87002-02 has a fu • Two LVCMOS/LVTTL outputs, 7? typical output impedance\n• Internal bias on nCLK to support LVCMOS/LVTTL levels on CLK input\n• Input frequency range: 15.625MHz to 250MHz\n• External feedback for \"zero delay\" clock regeneration with configurable frequencies\n• Fully integrated PLL\n• Output skew: ;

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QFN

IDT

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MOLEX

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