LVCMOS/LVTTL Clock Divider

The ICS87001I-01 is a low skew, ÷1, ÷2, ÷3, ÷4, ÷5, ÷6, ÷8, ÷16 LVCMOS/LVTTL Clock Divider. The ICS87001I-01 has selectable clock inputs that accept single ended input levels. Output enable pin controls whether the output is in the active or high impedance state. The ICS87001I-01 is characterized at ·One LVCMOS / LVTTL output\n·Selectable LVCMOS / LVTTL clock inputs \n·Maximum output frequency: 250MHz\n·Part-to-part skew: 135ps (typical)\n·Power supply modes:Core/Output3.3V/3.3V3.3V/2.5V3.3V/1.8V2.5V/2.5V2.5V/1.8V\n·-40°C to 85°C ambient operating temperature\n·Available in lead-free (RoHS 6) p;

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Maximum output frequency

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IDT

LVCMOS/LVTTL Clock Divider

General Description The ICS87001I-01 is a low skew, ÷1, ÷2, ÷3, ÷4, ÷5, ÷6, ÷8, ÷16 LVCMOS/LVTTL Clock Divider. The ICS87001I-01 has selectable clock inputs that accept single ended input levels. Output enable pin controls whether the output is in the active or high impedance state. The ICS87

文件：579.1 Kbytes 页数：15 Pages

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QFN

IDT

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MOLEX

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