8535-21中文资料Low Skew,1-to-2 LVCMOS/LVTTL-to-3.3V LVPECL Clock Generator数据手册Renesas规格书

描述 Description

The 8535-21 is a low skew, high performance 1-to-2 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer and a member of the family of High Performance Clock Solutions from IDT. The 8535-21 has two single-ended clock inputs. The single-ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8535-21 ideal for those applications demanding well defined performance and repeatability.

特性 Features

• Two differential 3.3V LVPECL outputs
• Selectable CLK0 or CLK1 inputs for redundant and multiple frequency fanout applications
• CLK0 or CLK1 can accept the following input levels: LVCMOS or LVTTL
• Maximum output frequency: 266MHz
• Translates LVCMOS and LVTTL levels to 3.3V LVPECL levels
• Output skew: 20ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Propagation delay: 1.6ns (maximum)
• Additive phase jitter, RMS: 0.03ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
• Available in lead-free (RoHS 6)