Low Skew, 1-to-2, Differential/LVCMOS to- 0.7V HCSL Fanout Buffer

FEATURES • Two 0.7V differential HCSL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 50

文件：348.42 Kbytes 页数：18 Pages

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瑞萨

Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer

The 85102I is a low skew, high performance 1-to-2 Differential-to-HCSL fanout buffer. The 85102I has a differential clock input. The CLK0, nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output dur Two 0.7V differential HCSL outputs\nSelectable differential CLK0, nCLK0 or LVCMOS inputs\nCLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL\nCLK1 can accept the following input levels: LVCMOS or LVTTL\nMaximum output frequency: 500MHz\nTranslates any sin;

Renesas

瑞萨

Electronic, 2 C #16 Str TC, ETFE Ins, ETFE Jkt

文件：248 Kbytes 页数：2 Pages

BELDEN

百通

Low Skew, 1-to-2, Differential/LVCMOS HCSL Fanout Buffer

文件：244.78 Kbytes 页数：17 Pages

IDT

Low Skew, 1-to-2, Differential/LVCMOS HCSL Fanout Buffer

文件：244.78 Kbytes 页数：17 Pages

IDT