PCI Express™Clock Generator

The 841S04I is a PLL-based clock generator specifically designed for PCI_Express™ Clock Generation applications. This device generates a 100MHz HCSL clock. The device offers a HCSL (Host Clock Signal Level) clock output from a clock input reference of 25MHz. The input reference may be derived from a ·Four 0.7V current mode differential HCSL output pairs\n·Crystal oscillator interface: 25MHz\n·Output frequency: 100MHz\n·RMS period jitter: 3ps (maximum)\n·Output skew: 70ps (maximum)\n·Cycle-to-cycle jitter: 35ps (maximum)\n·I2C support with readback capabilities up to 400kHz\n·Spread Spectrum for;

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PCI Express™ Clock Generator

Features • Four 0.7V current mode differential HCSL output pairs • Crystal oscillator interface: 25MHz • Output frequency: 100MHz • RMS period jitter: 3ps (maximum) • Output skew: 70ps (maximum) • Cycle-to-cycle jitter: 35ps (maximum) • I2C support with readback capabilities up to 400kHz •

文件：556.03 Kbytes 页数：18 Pages

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瑞萨

PCI Express™ Clock Generator

Features • Four 0.7V current mode differential HCSL output pairs • Crystal oscillator interface: 25MHz • Output frequency: 100MHz • RMS period jitter: 3ps (maximum) • Output skew: 70ps (maximum) • Cycle-to-cycle jitter: 35ps (maximum) • I2C support with readback capabilities up to 400kHz •

文件：556.03 Kbytes 页数：18 Pages

RENESAS

瑞萨

PCI Express™ Clock Generator

Features • Four 0.7V current mode differential HCSL output pairs • Crystal oscillator interface: 25MHz • Output frequency: 100MHz • RMS period jitter: 3ps (maximum) • Output skew: 70ps (maximum) • Cycle-to-cycle jitter: 35ps (maximum) • I2C support with readback capabilities up to 400kHz •

文件：556.03 Kbytes 页数：18 Pages

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