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8344BYT中文资料IDT数据手册PDF规格书

8344BYT
厂商型号

8344BYT

功能描述

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

文件大小

141.04 Kbytes

页面数量

18

生产厂商 Integrated Device Technology, Inc.
企业简称

IDT

中文名称

Integrated Device Technology, Inc.官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-6-10 22:59:00

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8344BYT规格书详情

GENERAL DESCRIPTION

The ICS8344 is a low voltage, low skew, 1-to-24 Differentialto-LVCMOS Fanout Buffer. The ICS8344 is designed to translate any differential signal levels to LVCMOS levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased to 48 by utilizing the ability of the outputs to drive two series terminated lines. Redundant clock applications can make use of the dual clock input. The dual clock inputs also facilitate board level testing. ICS8344 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes.

FEATURES

• Twenty-four LVCMOS outputs, 7Ω typical output impedance

• Selectable differential clock input pairs for redundant clock applications

• CLKx, nCLKx pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency: 167MHz

• Translates any differential input signal (LVPECL, LVHSTL, LVDS) to LVCMOS without external bias networks

• Translates any single-ended input signal to LVCMOS with resistor bias on nCLK input

• Multiple output enable pins for disabling unused outputs in reduced fanout applications

• Output skew: 275ps (maximum)

• Part-to-part skew: 600ps (maximum)

• Bank skew: 150ps (maximum)

• Propagation Delay: 4.3ns (maximum)

• 3.3V, 2.5V or mixed 3.3V, 2.5V operating supply modes

• 0°C to 70°C ambient operating temperature

• Available in standard (RoHS 5) and lead-free (RoHS 6) packages

产品属性

  • 型号:

    8344BYT

  • 制造商:

    Integrated Device Technology Inc

  • 功能描述:

    CLOCK DRVR 2-IN LVCMOS 48LQFP - Tape and Reel

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