Jitter Attenuator & FemtoClock® NG Multiplier

General Description The 813N2532I device uses IDT's fourth generation FemtoClock® NG technology for optimal high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The 813N2532I is a PLL based synchronous multiplier th

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Jit ter At tenuator & FemtoClock NG Mult iplier

文件：373.07 Kbytes 页数：24 Pages

IDT

Jitter Attenuator & Femtoclock® NG Multiplier

The 813N2532I device uses IDT's fourth generation FemtoClock® NG technology for optimal high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The 813N2532I is a PLL based synchronous multiplier that is optimized for PDH or • Fourth generation FemtoClock® NG technology\n• Two LVPECL output pairs\n• Output frequencies: 19.44MHz, 25MHz, 125MHz, 155.52MHz and 156.25MHz\n• Two differential inputs support the following input types: LVPECL, LVDS, LVHSTL, HCSL\n• Accepts input frequencies from 8kHz to 38.88MHz including 8kHz,;

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瑞萨

Jit ter At tenuator & FemtoClock NG Mult iplier

文件：371.1 Kbytes 页数：24 Pages

IDT

Jitter Attenuator and FemtoClock® NG Multiplier

Description The 813N2532 device uses IDT's fourth generation FemtoClock® NG technology for optimal high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The 813N2532 is a PLL based synchronous multiplier that is opti

文件：885.62 Kbytes 页数：22 Pages

RENESAS

瑞萨

Jit ter At tenuator & FemtoClock NG Mult iplier

文件：373.07 Kbytes 页数：24 Pages

IDT