9 BIT PARITY GENERATOR

DESCRIPTION The 74LVQ280 is a low voltage CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. ■ HIGH SPEED: tPD = 8 ns (TYP.) at VCC = 3.3 V ■ COMPATIBLE WITH TTL OUTPUTS

文件：229.27 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

9 BIT PARITY GENERATOR

文件：276.63 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

9 BIT PARITY GENERATOR

DESCRIPTION The 74LVQ280 is a low voltage CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. ■ HIGH SPEED: tPD = 8 ns (TYP.) at VCC = 3.3 V ■ COMPATIBLE WITH TTL OUTPUTS

文件：229.27 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

9 BIT PARITY GENERATOR

文件：276.63 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

9 BIT PARITY GENERATOR

DESCRIPTION The 74LVQ280 is a low voltage CMOS 9 BIT PARITY GENERATOR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. ■ HIGH SPEED: tPD = 8 ns (TYP.) at VCC = 3.3 V ■ COMPATIBLE WITH TTL OUTPUTS

文件：229.27 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体