SINGLE 3-INPUT POSITIVE-XOR GATE

Features « Wide supply voltage range from 1.65V to 5.5V « Supports 5V Vcc operation «lor supports partial-power-down mode back-drive protection » Low power consumption, ICC=10pA (Max) » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V

文件：3.25322 Mbytes 页数：7 Pages

TECHPUBLIC

台舟电子

3-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. FEATURE

文件：74.85 Kbytes 页数：15 Pages

PHI

飞利浦

3-input EXCLUSIVE-OR gate

1. General description The 74LVC1G386 is a single 3-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant o

文件：215.52 Kbytes 页数：12 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

3-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. FEATURE

文件：74.85 Kbytes 页数：15 Pages

PHI

飞利浦

3-input EXCLUSIVE-OR gate

1. General description The 74LVC1G386 is a single 3-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant o

文件：215.52 Kbytes 页数：12 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司