74LVC1G123DP-Q100中文资料Single retriggerable monostable multivibrator; Schmitt trigger数据手册Nexperia规格书

描述 Description

The 74LVC1G123-Q100 is a single retriggerable monostable multivibrator with Schmitt trigger inputs. Output pulse width is controlled by three methods:
The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process, the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the triggering.An internal connection from CLR to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input CLR. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. Schmitt trigger inputs, makes the circuit highly tolerant to slower input rise and fall times.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性 Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C

• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• DC triggered from active HIGH or active LOW inputs
• Retriggerable for very long pulses up to 100 % duty factor
• Direct reset terminates output pulse
• Schmitt trigger on all inputs
• Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8-B/JESD36 (2.7 V to 3.6 V)

• Power-on-reset on outputs
• Latch-up performance exceeds 100 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

• Multiple package options