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74LVC1G123DC数据手册集成电路(IC)的多谐振荡器规格书PDF

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厂商型号

74LVC1G123DC

参数属性

74LVC1G123DC 封装/外壳为8-VFSOP(0.091",2.30mm 宽);包装为卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带;类别为集成电路(IC)的多谐振荡器;产品描述:IC MULTIVIBRATOR 12NS 8VSSOP

功能描述

Single retriggerable monostable multivibrator; Schmitt trigger inputs

封装外壳

8-VFSOP(0.091",2.30mm 宽)

制造商

Nexperia Nexperia B.V. All rights reserved

中文名称

安世 安世半导体(中国)有限公司

数据手册

下载地址下载地址二

更新时间

2025-8-7 10:04:00

人工找货

74LVC1G123DC价格和库存,欢迎联系客服免费人工找货

74LVC1G123DC规格书详情

描述 Description

The 74LVC1G123 is a single retriggerable monostable multivibrator with Schmitt trigger inputs. Output pulse width is controlled by three methods:
The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process, the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the triggering.An internal connection from CLR to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input CLR. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. Schmitt-trigger inputs, makes the circuit highly tolerant to slower input rise and fall times.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

特性 Features

• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• DC triggered from active HIGH or active LOW inputs
• Retriggerable for very long pulses up to 100 % duty factor
• Direct reset terminates output pulse
• Schmitt trigger on all inputs
• Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8-B/JESD36 (2.7 V to 3.6 V)

• Power-on-reset on outputs
• Latch-up performance exceeds 100 mA
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V

• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

技术参数

  • 制造商编号

    :74LVC1G123DC

  • 生产厂家

    :Nexperia

  • VCC (V)

    :1.65 - 5.5

  • Logic switching levels

    :CMOS/LVTTL

  • Output drive capability (mA)

    :± 32

  • tpd (ns)

    :3.5

  • Power dissipation considerations

    :low

  • Tamb (°C)

    :-40~125

  • Rth(j-a) (K/W)

    :203

  • Ψth(j-top) (K/W)

    :34.0

  • Rth(j-c) (K/W)

    :113

  • Package name

    :VSSOP8

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