74LVC1G123DCTRG4集成电路（IC）的多谐振荡器规格书PDF中文资料

74LVC1G123DCTRG4属于集成电路（IC）的多谐振荡器。由美国德州仪器公司制造生产的74LVC1G123DCTRG4多谐振荡器多谐振荡器是简单的双态器件，尽管它们的典型使用方式在很大程度上具有模拟特性，但通常被认为是数字逻辑元器件。单稳型也称为“单发”，具有一种稳定状态；但施加触发信号可使它们离开此状态一段时间，该时间通常由所连接电容器的值来确定。这些器件对于去弹跳开关触头等应用非常有用。非稳型没有稳定状态，在两个状态之间按一定频率持续转换，该频率通常也是由所连接电容器的值来确定。

1 Features

• Available in the Texas Instruments

NanoFree™ Package

• Supports 5V VCC Operation

• Inputs Accept Voltages to 5.5V

• Max tpd of 8ns at 3.3V

• Supports Mixed-Mode Voltage Operation on

All Ports

• Supports Down Translation to VCC

• Schmitt-Trigger Circuitry on A and B Inputs for

Slow Input Transition Rates

• Edge Triggered From Active-High or Active-Low

Gated Logic Inputs

• Retriggerable for Very Long Output Pulses, Up to

100% Duty Cycle

• Overriding Clear Terminates Output Pulse

• Glitch-Free Power-Up Reset on Outputs

• Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

• Latch-Up Performance Exceeds 100 mA Per JESD

78, Class II

• ESD Protection Exceeds JESD 22

– 2000V Human-Body Model (A114-A)

– 200V Machine Model (A115-A)

– 1000V Charged-Device Model (C101)

2 Applications

• AV Receivers

• Blu-ray Players and Home Theaters

• DVD Recorders and Players

• Desktop PCs or Notebook PCs

• Digital Radio and Internet Radio Players

• Digital Video Cameras (DVC)

• Embedded PCs

• GPS: Personal Navigation Devices

• Mobile Internet Devices

• Network Attached Storage (NAS)

• Personal Digital Assistant (PDA)

• Server PSU

• Solid-State Drive (SSD): Client and Enterprise

• Video Analytics Servers

• Wireless Headsets, Keyboards, and Mice

3 Description

The SN74LVC1G123 device is a single retriggerable

monostable multivibrator designed for 1.65V to 5.5V

VCC operation.

This monostable multivibrator features output pulseduration

control by three methods. In the first method,

the A input is low, and the B input goes high. In the

second method, the B input is high, and the A input

goes low. In the third method, the A input is low, the B

input is high, and the clear ( CLR) input goes high.

The output pulse duration is programmed by selecting

external resistance and capacitance values. The

external timing capacitor must be connected between

Cext and Rext/Cext (positive) and an external resistor

connected between Rext/Cext and VCC. To obtain

variable pulse durations, connect an external variable

resistance between Rext/Cext and VCC. The output

pulse duration also can be reduced by taking CLR

low.

Pulse triggering occurs at a particular voltage level

and is not directly related to the transition time of

the input pulse. The A and B inputs have Schmitt

triggers with sufficient hysteresis to handle slow input

transition rates with jitter-free triggering at the outputs.