74LV4060PW数据手册集成电路（IC）的计数器除法器规格书PDF

描述 Description

The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC4060; 74HCT4060.
The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC). It has ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator can be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating.
The counter advances on the negative-going transition of RS. A HIGH-level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions.

特性 Features

• Wide operating voltage range from 1.0 V to 5.5 V
• Optimized for low voltage applications from 1.0 V to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V; Tamb = 25 °C
• Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V; Tamb = 25 °C
• All active components on-chip
• RC or crystal oscillator configuration
• Complies with JEDEC standard no. 7A
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115A exceeds 200 V

应用 Application

• Control counters
• Timers
• Frequency dividers
• Time-delay circuits