74LV4052DB数据手册Nexperia中文资料规格书

描述 Description

The 74LV4052 is a low-voltage CMOS device and is pin and function compatible with the 74HC/HCT4052.
The 74LV4052 is a dual 4-channel analog multiplexer/demultiplexer with a common select logic. Each multiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output (nZ). The common channel select logics include two digital select inputs (S0 and S1) and an active LOW enable input (E). With E LOW, one of the four switches is selected (low impedance ON-state) by S0 and S1. With E HIGH, all switches are in the high impedance OFF-state, independent of S0 and S1. VCC and GND are the supply voltage pins for the digital control inputs (S0, S1 and E). The VCC to GND ranges are 1.0V to 6.0V. The analog inputs/outputs (nY0, to nY3, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

特性 Features

• Optimized for low voltage applications: 1.0 to 6.0 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Low ON resistance:
• 145Ω (typical) at VCC - VEE = 2.0V
• 90Ω (typical) at VCC - VEE = 3.0 V
• 60Ω (typical) at VCC - VEE = 4.5 V

• Logic level translation:
• To enable 3 V logic to communicate with ±3V analog signals

• Typical \"break before make\" built in
• ESD protection:
• HBM JESD22-A114E exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V

• Multiple package options
• Specified from -40°C to +85°C and from -40°C to +125°C