74LV245APW数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The 74LV245A is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.
Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性 Features

• Wide supply voltage range from 2.0 V to 5.5 V
• Maximum tpd of 6.5 ns at 5 V
• Typical VOL(p)< 0.8 V at VCC = 3.3 V, Tamb = 25 °C
• Typical VOH(v)> 2.3 V at VCC = 3.3 V, Tamb = 25 °C
• Supports mixed-mode voltage operation on all ports
• IOFF circuitry provides partial Power-down mode operation
• Latch-up performance exceeds 250 mA per JESD 78 Class II
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 2 kV

• Multiple package options
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C