Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

OCTAL D-TYPE TRANSPARENT LATCH(3-State)

SL74LV373 are compatible by pinning with SL74HC373 and SL74HCT373 series. Input voltage levels are compatible with standard CMOS levels. • Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS • Voltage supply range: 2.0 to 3.2 V • LOW input current: 1.0 mÀ; 0.1 mÀ at

文件：47.9 Kbytes 页数：8 Pages

SLS

OCTAL D-TYPE TRANSPARENT LATCH(3-State)

SLS

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

Octal D-type transparent latch 3-State

DESCRIPTION The 74LV373 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT373. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP

文件：123.2 Kbytes 页数：12 Pages

PHI

飞利浦

丝印：74LV373A；Package：SO；SN74LV373A Octal Transparent D-Type Latches With 3-State Outputs

1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 8.5 ns at 5 V • Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Support Mixed-Mode Voltage Operation on All Ports • Ioff Supports Pa

文件：2.04719 Mbytes 页数：33 Pages

TI

德州仪器

丝印：74LV373AT；Package：SOP；OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Inputs Are TTL-Voltage Compatible · 4.5-V to 5.5-V V CC Operation · Typical tpd of 5.1 ns at 5 V · Typical V OLP (Output Ground Bounce) 2.3 V at VCC = 5 V, TA = 25°C · Supports Mixed-Mode Voltage Operation o

文件：711.66 Kbytes 页数：18 Pages

TI

德州仪器