Octal buffer/line driver; inverting 3-State

DESCRIPTION The 74LV240 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT240. FEATURES • Wide operating voltage: 1.0 to 5.5 V • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VO

文件：115.23 Kbytes 页数：12 Pages

PHI

飞利浦

Octal buffer/line driver; inverting 3-State

DESCRIPTION The 74LV240 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT240. FEATURES • Wide operating voltage: 1.0 to 5.5 V • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VO

文件：115.23 Kbytes 页数：12 Pages

PHI

飞利浦

Octal Buffers / Drivers with 3-state Outputs

Description The HD74V240A has eight inverter drivers with three-state outputs in a 20-pin package. Four inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low-voltage operati

文件：68.12 Kbytes 页数：14 Pages

HitachiHitachi Semiconductor

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Octal Buffers / Drivers with 3-state Outputs

Description The HD74V240A has eight inverter drivers with three-state outputs in a 20-pin package. Four inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low-voltage operati

文件：83.62 Kbytes 页数：10 Pages

RENESAS

瑞萨

Octal Buffers / Drivers with 3-state Outputs

Description The HD74V240A has eight inverter drivers with three-state outputs in a 20-pin package. Four inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low-voltage operati

文件：83.62 Kbytes 页数：10 Pages

RENESAS

瑞萨