4-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7403 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no.7A. FEATURES • Synchronous or asynchronous operation • 3-state outputs • 30 MHz (typical) shift-in and shift-out rates • Readily expandable in word

文件：163.83 Kbytes 页数：28 Pages

PHI

PHI

4-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7403 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no.7A. FEATURES • Synchronous or asynchronous operation • 3-state outputs • 30 MHz (typical) shift-in and shift-out rates • Readily expandable in word

文件：163.83 Kbytes 页数：28 Pages

PHI

PHI

4-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7403 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no.7A. FEATURES • Synchronous or asynchronous operation • 3-state outputs • 30 MHz (typical) shift-in and shift-out rates • Readily expandable in word

文件：163.83 Kbytes 页数：28 Pages

PHI

PHI

5-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7404 are high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no.7A. The “7404” is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 5 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications.

文件：131.73 Kbytes 页数：28 Pages

PHI

PHI

5-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7404 are high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no.7A. The “7404” is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 5 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications.

文件：131.73 Kbytes 页数：28 Pages

PHI

PHI

5-Bit x 64-word FIFO register; 3-state

GENERAL DESCRIPTION The 74HC/HCT7404 are high-speed Si-gate CMOS devices specified in compliance with JEDEC standard no.7A. The “7404” is an expandable, First-In First-Out (FIFO) memory organized as 64 words by 5 bits. A guaranteed 15 MHz data-rate makes it ideal for high-speed applications.

文件：131.73 Kbytes 页数：28 Pages

PHI

PHI

4-bit x 64-word FIFO register; 3-state

文件：299.36 Kbytes 页数：32 Pages

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