74HC280D集成电路（IC）的奇偶校验发生器校验器规格书PDF中文资料

厂商型号	74HC280D
参数属性	74HC280D 封装/外壳为14-SOIC（0.154"，3.90mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的奇偶校验发生器校验器；产品描述：IC PARITY GEN/CHKER 9-BIT 14SO
功能描述	9-bit odd/even parity generator/checker
封装外壳	14-SOIC（0.154"，3.90mm 宽）
文件大小	245.09 Kbytes
页面数量	13 页
生产厂商	NEXPERIA Nexperia B.V. All rights reserved
中文名称	安世安世半导体(中国)有限公司
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-10-12 22:59:00
人工找货	74HC280D价格和库存，欢迎联系客服免费人工找货

1. General description

The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs

are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8)

is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH.

Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine

parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of

current limiting resistors to interface inputs to voltages in excess of VCC.

2. Features and benefits

• Word-length easily expanded by cascading

• Generates either odd or even parity for nine data bits

• Wide supply voltage range from 2.0 to 6.0 V

• Input levels:

• For 74HC280: CMOS level

• For 74HCT280: TTL level

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Specified from -40 °C to +85 °C and -40 °C to +125 °C