74HC273PW集成电路（IC）的触发器规格书PDF中文资料

厂商型号	74HC273PW
参数属性	74HC273PW 封装/外壳为20-TSSOP（0.173"，4.40mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的触发器；产品描述：IC FF D-TYPE SNGL 8BIT 20TSSOP
功能描述	Octal D-type flip-flop with reset; positive-edge trigger
封装外壳	20-TSSOP（0.173"，4.40mm 宽）
文件大小	279.81 Kbytes
页面数量	17 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
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数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-6-28 18:33:00
人工找货	74HC273PW价格和库存，欢迎联系客服免费人工找货

1. General description

The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device

features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their

corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH

clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data

inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface

inputs to voltages in excess of VCC.

2. Features and benefits

• Wide supply voltage range from 2.0 V to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards:

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• Input levels:

• For 74HC273: CMOS level

• For 74HCT273: TTL level

• Common clock and master reset

• Eight positive edge-triggered D-type flip-flops

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Multiple package options

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C