74HC238DB中文资料74HC238DB - 3-to-8 line decoder/demultiplexer数据手册Nexperia规格书

描述 Description

3-to-8 line decoder/demultiplexer - The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four \\'238 ICs and one inverter. The \\'238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

特性 Features

·Demultiplexing capability
·Multiple input enable for easy expansion
·Ideal for memory chip select decoding
·Active HIGH mutually exclusive outputs
·Multiple package options
·Complies with JEDEC standard no. 7A
·Input levels:·For 74HC238: CMOS level
·For 74HCT238: TTL level