74系列逻辑芯片

ONSEMI

安森美半导体

Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

文件：262.12 Kbytes 页数：15 Pages

NEXPERIA

安世

Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

文件：44.04 Kbytes 页数：7 Pages

PHI

PHI

Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

文件：262.12 Kbytes 页数：15 Pages

NEXPERIA

安世

Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

文件：44.04 Kbytes 页数：7 Pages

PHI

PHI