74HC137集成电路（IC）的信号开关多路复用器解码器规格书PDF中文资料

厂商型号	74HC137
参数属性	74HC137 封装/外壳为16-SOIC（0.154"，3.90mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的信号开关多路复用器解码器；产品描述：IC DECODER/DEMUX 1 X 3:8 16SO
功能描述	3-to-8 line decoder, demultiplexer with address latches; inverting
封装外壳	16-SOIC（0.154"，3.90mm 宽）
文件大小	273.83 Kbytes
页面数量	16 页
生产厂商	Nexperia B.V. All rights reserved
企业简称	NEXPERIA【安世】
中文名称	安世半导体(中国)有限公司官网
原厂标识
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-6-29 22:01:00
人工找货	74HC137价格和库存，欢迎联系客服免费人工找货

1. General description

The 74HC137 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually

exclusive outputs (Y0 to Y7). The device features a latch enable (LE) and two output enable (E1,

E2) inputs. A LOW on LE causes the device to act as an active LOW decoder. A LOW-to HIGH

transition on LE stores the data that was present before the transition in the latches. Further

address changes are ignored as long as LE remains HIGH.

The output enable inputs control the state of the outputs independently of the address inputs or

latch operation. All outputs will be HIGH unless E1 is LOW and E2 is HIGH.

Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to

voltages in excess of VCC.

2. Features and benefits

• Combines 3-to-8 decoder with 3-bit latch

• Multiple input enable for easy expansion or independent controls

• Active LOW mutually exclusive outputs

• Wide supply voltage range from 2.0 to 6.0 V

• CMOS low power dissipation

• High noise immunity

• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

• Complies with JEDEC standards

• JESD8C (2.7 V to 3.6 V)

• JESD7A (2.0 V to 6.0 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Specified from -40 °C to +80 °C and from -40 °C to +125 °C.