Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct

文件：74.78 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Package：14-SOIC（0.209"，5.30mm 宽）；包装：管件 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SOP

ONSEMI

安森美半导体

Dual D-type flip-flop

DESCRIPTION The 74F74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock input. When set and reset are in

文件：80.55 Kbytes 页数：8 Pages

PHI

PHI

Dual D-type flip-flop

DESCRIPTION The 74F74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock input. When set and reset are in

文件：80.55 Kbytes 页数：8 Pages

PHI

PHI

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：76.4 Kbytes 页数：6 Pages

TI

德州仪器