Octal D-Type Flip-Flop with Clock Enable

General Description The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set

文件：62.13 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

文件：75.98 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

ONSEMI

安森美半导体

Octal D-type flip-flop with enable

DESCRIPTION The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge triggered. The state of each D input, one set-up time befor

文件：84.15 Kbytes 页数：10 Pages

PHI

飞利浦

Octal D-Type Flip-Flop with Clock Enable

General Description The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set

文件：62.13 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

General Description The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set

文件：62.13 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

General Description The 74F377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set

文件：62.13 Kbytes 页数：6 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

文件：75.98 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Octal D-Type Flip-Flop with Clock Enable

文件：75.98 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Octal D Flip-Flop with Clock Enable

文件：143.07 Kbytes 页数：8 Pages

NSC

国半