74ALVCH16373TX数据手册集成电路（IC）的锁存器规格书PDF

描述 Description

General Description
The ALVCH16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.
The ALVCH16373 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.
The 74ALVCH16373 is designed for low voltage (1.65V to 3.6V) VCC applications with output compatibility up to 3.6V. The 74ALVCH16373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain ing low CMOS power dissipation.

特性 Features

■ 1.65V to 3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold on data inputs eliminates the need for external
   pull-up/pull-down resistors
■ tPD (In to On)
   3.6 ns max for 3.0V to 3.6V VCC
   4.5 ns max for 2.3V to 2.7V VCC
   6.8 ns max for 1.65V to 1.95V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up conforms to JEDEC JED78
■ ESD performance:
   Human body model 2000V
   Machine model 200V

简介

74ALVCH16373TX属于集成电路（IC）的锁存器。由制造生产的74ALVCH16373TX锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。