74ALVCH16373TTR集成电路（IC）的锁存器规格书PDF中文资料

74ALVCH16373TTR属于集成电路（IC）的锁存器。由意法半导体集团制造生产的74ALVCH16373TTR锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。

DESCRIPTION

The 74ALVCH16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs.

When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state.This device is designed to be used with 3 state memory address drivers, etc.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ 3.6V TOLERANT INPUTS AND OUTPUTS

■ HIGH SPEED :

tPD = 3.6 ns (MAX.) at VCC = 3.0 to 3.6V

tPD = 4.5 ns (MAX.) at VCC = 2.3 to 2.7V

tPD = 6.5 ns (MAX.) at VCC = 1.65V

■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 24mA (MIN) at VCC = 3.0V

|IOH| = IOL = 18mA (MIN) at VCC = 2.3V

|IOH| = IOL = 4mA (MIN) at VCC = 1.65V

■ OPERATING VOLTAGE RANGE:

VCC(OPR) = 1.65V to 3.6V

■ BUS HOLD PROVIDED ON DATA INPUTS

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16373

■ LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V