1. General description

The 74ALVCH16373 is a 16-bit D-type transparent latch with bus hold inputs and 3-state outputs.

The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The

device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each

controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the

latches are transparent, a latch output will change each time its corresponding D-input changes.

When nLE is LOW the latches store the information that was present at the inputs a set-up time

preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a

high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. This

device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables

the output, preventing the potentially damaging backflow current through the device when it is

powered down.

2. Features and benefits

• Wide supply voltage range from 1.2 V to 3.6 V

• CMOS low power dissipation

• MULTIBYTE flow-through standard pin-out architecture

• Low inductance multiple VCC and GND pins for minimum noise and ground bounce

• Direct interface with TTL levels

• All data inputs have bus hold

• Latch-up performance exceeds 100 mA per JESD78 Class II Level B

• Output drive capability 50 Ω transmission lines at 85 °C

• Complies with JEDEC standards:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-B exceeds 200 V

• Current drive ±24 mA at VCC = 3.0 V

• Specified from -40 °C to +85 °C

74ALVCH16373属于集成电路（IC） > 锁存器。安世半导体(中国)有限公司制造生产的74ALVCH16373锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。