74ALVC162240T集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

General Description

The ALVC162240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The 74ALVC162240 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O capability up to 3.6V. The 74ALVC162240 is also designed with 26Ω series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The 74ALVC162240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

特性 Features

■ 1.65V to 3.6V VCC supply operation

■ 3.6V tolerant inputs and outputs

■ 26Ω series resistors in outputs

■ tPD

3.8 ns max for 3.0V to 3.6V VCC

4.3 ns max for 2.3V to 2.7V VCC

7.6 ns max for 1.65V to 1.95V VCC

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

■ Uses patented noise/EMI reduction circuitry

■ Latchup conforms to JEDEC JED78

■ ESD performance:

Human body model > 2000V

Machine model > 200V