Dual D-type flip-flop with set and reset; positive-edge trigger

DESCRIPTION The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：92.28 Kbytes 页数：20 Pages

PHI

飞利浦

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：99.27 Kbytes 页数：7 Pages

TI

德州仪器

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：650.72 Kbytes 页数：2 Pages

TI

德州仪器

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：962.14 Kbytes 页数：25 Pages

TI

德州仪器