74AHC139PW-Q100中文资料Dual 2-to-4 line decoder/demultiplexer数据手册Nexperia规格书

描述 Description

The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.
The 74AHC139-Q100; 74AHCT139-Q100 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders. Each decoder accepts two binary weighted inputs (nA0 and nA1) and provides four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1‑to‑4 demultiplexer application.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性 Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40°C to +85°C and from -40°C to +125°C

• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Inputs accept voltages higher than VCC
• Input levels:
• For 74AHC139-Q100: CMOS level
• For 74AHCT139-Q100: TTL level

• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000V
• HBM JESD22-A114F exceeds 2000V
• MM JESD22-A115-A exceeds 200V (C = 200pF, R = 0Ω)

• Multiple package options