74ACT16841中文资料具有三态输出的 20 位总线接口 D 类锁存器数据手册TI规格书

描述 Description

These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The 'ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.
A buffered output-enable (1 or 2) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74ACT16841 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16841 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16841 is characterized for operation from -40°C to 85°C.
 
 

特性 Features

• Members of the Texas Instruments WidebusTM Family
• Inputs Are TTL-Voltage Compatible
• 3-State Outputs Drive Bus Lines Directly
• Provide Extra Bus Driving/Latches Necessary for WiderAddress/Data Paths or Buses With Parity
• Flow-Through Architecture Optimizes PCB Layout
• Distributed VCC and GND Pin Configuration MinimizesHigh-Speed Switching Noise
• EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Thin Shrink Small-Outline(DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using25-mil Center-to-Center Pin Spacings, and 380-mil Fine-PitchCeramic Flat (WD) Packages Using 25-mil Center-to-Center PinSpacings  EPIC and Widebus are trademarks of Texas Instruments Incorporated.