丝印：74AC11008N；Package：PDIP；QUADRUPLE 2-INPUT POSITIVE-AND GATE

Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Thin Shrink Sm

文件：462.78 Kbytes 页数：15 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-AND GATE

文件：76.61 Kbytes 页数：5 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-AND GATE

文件：644.32 Kbytes 页数：14 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-AND GATE

文件：644.32 Kbytes 页数：14 Pages

TI

德州仪器