74ABT74PW数据手册集成电路（IC）的触发器规格书PDF

描述 Description

The 74ABT74 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (nSD) and reset (nRD) are asynchronous active low inputs and operate independently of the clock input. When set and reset are inactive (HIGH), data at the nD input is transferred to the nQ and nQ outputs on the LOW-to-HIGH clock transition. Data must be stable just one setup time prior to the LOW-to-HIGH clock transition for predictable operation. Clock triggering occurs at a voltage level and is not directly related to the transition time of the positive-going pulse. Following the hold time interva

特性 Features

• Latch-up protection exceeds 500 mA per JESD78B class II level A
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V

• Multiple package options
• Specified from -40 °C to +85 °C