74ABT2952中文资料Octal Registered Transceiver数据手册ONSEMI规格书

描述 Description

General Description
The ABT2952 is an octal registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The output pins are guaranteed to source 32 mA and to sink 64 mA.

特性 Features

■ Separate clock, clock enable and 3-STATE output
   enable provided for each register
■ A and B output sink capability of 64 mA source capability of 32 mA
■ Guaranteed output skew
■ Guaranteed multiple output switching specifications
■ Output switching specified for both 50 pF and 250 pF loads
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Guaranteed latchup protection
■ High impedance glitch free bus loading during entire
   power up and power down cycle
■ Nondestructive hot insertion capability

简介

74ABT2952属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74ABT2952缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。