72T36135M数据手册集成电路（IC）的FIFO存储器规格书PDF

描述 Description

The 72T36135M is a 512K x 36 TeraSync 2.5V FIFO memory with clocked read and write controls and a wide extended x 36 bus to allow ample data flow. TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data at very high performance. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.

特性 Features

Functionally and pin compatible to 9Mbit 72T36125
User selectable HSTL/LVTTL Input and/or Output
User selectable Asynchronous read and/or write port timing
Program programmable flags by either serial or parallel means
Auto power down minimizes standby power consumption
Master Reset clears entire FIFO
Partial Reset clears data, but retains programmable settings
Empty and Full flags signal FIFO status
Output enable puts data outputs into high impedance state
JTAG port, provided for Boundary Scan function
Available in 240-pin PBGA package
Independent Read and Write Clocks (permit reading and writing simultaneously)
Industrial temperature range (–40C to +85C) is available