64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 64K x 32 memory configuration ◆ Supports high system speed: Commercial and Industrial: – 5 5ns clock access time (100 MHz) – 6 6ns clock access time (83 MHz) – 7 7ns clock access time (66 MHz) ◆ Single-cycle deselect functionality ◆ LBO input selects interleaved or linear burst

文件：268.92 Kbytes 页数：19 Pages

RENESAS

瑞萨

64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 64K x 32 memory configuration ◆ Supports high system speed: Commercial and Industrial: – 5 5ns clock access time (100 MHz) – 6 6ns clock access time (83 MHz) – 7 7ns clock access time (66 MHz) ◆ Single-cycle deselect functionality ◆ LBO input selects interleaved or linear burst

文件：268.92 Kbytes 页数：19 Pages

RENESAS

瑞萨

64K x 32 3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

Features ◆ 64K x 32 memory configuration ◆ Supports high system speed: Commercial and Industrial: – 5 5ns clock access time (100 MHz) – 6 6ns clock access time (83 MHz) – 7 7ns clock access time (66 MHz) ◆ Single-cycle deselect functionality ◆ LBO input selects interleaved or linear burst

文件：268.92 Kbytes 页数：19 Pages

RENESAS

瑞萨

3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

文件：861.88 Kbytes 页数：18 Pages

IDT

3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

文件：861.88 Kbytes 页数：18 Pages

IDT

3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

文件：861.88 Kbytes 页数：18 Pages

IDT

3.3V Synchronous SRAM Pipelined Outputs Burst Counter, Single Cycle Deselect

文件：861.88 Kbytes 页数：18 Pages

IDT

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

Renesas Electronics America Inc

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

Renesas Electronics America Inc

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 2MBIT PARALLEL 100TQFP

Renesas Electronics America Inc