3.3V 32K x 32 Synchronous PipeLined Burst SRAM

The 71V4323.3V CMOS high-speed CacheRAM is organized as 32K x 32. The pipelined burst architecture provides cost effective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The 71V432 CacheRAM contains write, data, address, and control registers. The burst mode feature offers the hig Supports high-performance system speed\nCommercial and Industrial\n— 5ns Clock-to-Data Access (100MHz)\n— 6ns Clock-to-Data Access (83MHz)\n— 7ns Clock-to-Data Access (66MHz)\n Single-cycle deselect functionality (Compatible with\nMicron Part # MT58LC32K32D7LG-XX)\n LBO input selects interleaved or ;

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32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

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32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

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32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

文件：371.07 Kbytes 页数：18 Pages

RENESAS

瑞萨

Package：100-LQFP；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 1MBIT PARALLEL 100TQFP

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