6T30028DCGI中文资料瑞萨数据手册PDF规格书

Features/Benefits

• Four LVCMOS / LVTTL outputs

• LVCMOS clock input

• CLK can accept the following input levels: LVCMOS,

LVTTL

• Maximum output frequency: 166MHz

• Output skew: 60ps (maximum)

• Part-to-part skew: 650ps (maximum)

• Small 8 lead SOIC package saves board space

• 3.3V input, outputs may be either 3.3V or 2.5V supply

modes

• -40°C to +85°C ambient operating temperature

• Lead-free (RoHS 6) compliant packaging