56F8300中文资料16-bit Digital Signal Controllers数据手册恩XP规格书

描述 Description

56F8357/56F8157 General DescriptionNote: Features in italics are NOT available in the 56F8157 device.
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified, C-efficient architecture
• Access up to 4MB of off-chip program and 32MB of data memory
• Chip Select Logic for glueless interface to ROM and SRAM
• 256KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 16KB of Data RAM
• 16KB Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional on-chip regulator
• FlexCAN module
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging
• Up to 76 GPIO lines
• 160-pin LQFP Package and 160MAPBGA