LvHSTL to CMOS Clock Divider

The 558-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider (divide by 3, divide by 4). The four outputs are split into two banks of two outputs. Each bank has a separate output enable to tri-state the output buffers. The 558-02 is a member 16-pin TSSOP package\nLVHSTL inputs\nAccepts up to 250 MHz input frequency\nFour low skew (<250 ps) outputs\nSelectable internal divider of 3 or 4\nOperating voltage of 3.3 V;

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文件：135.32 Kbytes 页数：2 Pages

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文件：135.32 Kbytes 页数：2 Pages

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文件：145.12 Kbytes 页数：2 Pages

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558 Series Snap-in LED - .156??Mounting Hole

文件：145.12 Kbytes 页数：2 Pages

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558 Series Snap-in LED - .156??Mounting Hole

文件：145.12 Kbytes 页数：2 Pages

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