54VCXH162245数据手册ST中文资料规格书

描述 Description

The 54VCXH162245 is a low voltage CMOS 16-bit bus transceiver (3-state) fabricated with a sub-micron silicon gate and a five-layer metal wiring C²MOS technology. It is ideal for low power and very high speed (1.8 to 3.6 V) applications and can be interfaced to a 3.6 V signal environment for both inputs and outputs. This integrated circuit is intended for two-way asynchronous communication between data buses. The direction of data transmission is determined by digital input recorder (DIR) input. The two enable inputs, nG,can be used to disable the device so that the buses are effectively isolated. The device circuits include 26 Ω series resistance in the A port outputs. These resistors reduce line noise in high-speed applications. Bus hold on data inputs is provided to eliminate the need for external pull-up or pull-down resistors. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2 kV ESD immunity and transient excess voltage. All floating bus terminals during high Z state must be held HIGH or LOW.

特性 Features

• 1.8 to 3.6 V operating voltage
• High speed A outputs:
•tPD= 3.4 ns at VCC = 3.0 to 3.6 V
•tPD= 4.3 ns at VCC= 2.3 to 2.7 V
• Symmetrical impedance A output:
•|IOH| = IOL= 12 mA (min.) at VCC= 3.0 V
•|IOH| = IOL= 8 mA (min.) at VCC= 2.3 V
• High speed B outputs:
•tPD= 2.5 ns (max.) at VCC= 3.0 to 3.6 V
•tPD= 3.2 ns (max.) at VCC= 2.3 to 2.7 V
• Symmetrical impedance A output:
•|IOH| = IOL= 24 mA (min.) at VCC= 3.0 V
•|IOH| = IOL= 18 mA (min.) at VCC= 2.3 V
• Power down protection on inputs and outputs
• 26 Ω series resistors in A port output
• Bus hold provided on both sides
• Cold spare function
• Latch-up performance exceeds 300 mA (JESD 17)
• 300 krad(Si) Total ionizing dose (TID)
• No SEL, no SEU and no SET at 110 MeV.cm²/mg
• QML-V qualified
• SMD 5962F02508
• Mass = 1.50 g