These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

Hex/Quad D Flip-Flops with Clear

文件：174.65 Kbytes 页数：8 Pages

NSC

国半

Hex/Quad D Flip-Flops with Clear

General Description\nThese positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad (175) versions feature complementary outputs from each flip-flop.\nInformation at the D inputs meeting the setup time require ments is ■ LS174 contains six flip-flops with single-rail outputs\n■ LS175 contains four flip-flops with double-rail outputs\n■ Buffered clock and direct clear inputs\n■ Individual data input to each flip-flop\n■ Applications include:\n   Buffer/storage registers\n   Shift registers\n   Pattern generators\n■;

TI

德州仪器

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

Hex/Quad D Flip-Flops with Clear

文件：174.65 Kbytes 页数：8 Pages

NSC

国半

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

Hex/Quad D Flip-Flops with Clear

文件：174.65 Kbytes 页数：8 Pages

NSC

国半

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

Hex/Quad D Flip-Flops with Clear

文件：174.65 Kbytes 页数：8 Pages

NSC

国半